Problem being solved:

  • efficient fine-grained parallelism (
  • very parallel, 512/1024 cores (nodes)
  • fast synchronization/communication (low overhead)
  • J-machine (jelly bean - cheap cores, ubiquitous, lots of them)

Unique about solution:

  • hardware approach
  • HW primitives for enabling comm, sync, naming, context management
  • philosophy - balance memory and CPU costs (cheaper CPUs)
  • tight integration (jelly bean concept)
    • reduce latencies
    • reduces power
    • cheaper
  • specially designed network (3-D mesh) (reduces cost of comm some)
  • tagged memory for better sync
  • messages are explicit in the architecture
    • construct message with instructions
    • HW in place for receiving messages
    • active messages - data and pointer to handler routine (looks like an inlet like TAM)
    • handler is HW managed (launched)
  • global address space
  • unique and uniform name for every location in the system
  • segmented memory (base, bound, stripe), no page table
  • software had control over fine-grained communication between cores

Interconnect:

  • PCB traces to connect nodes (same PCB) (used for J-machine)
  • wires (coax) between PCBs (expensive, heavy, stiff)
  • ribbon cables (used for J-machines)
  • today - optical (fiber)
  • topology - 3-D taurus

Users:

  • same as TAM, research project that show these mechanisms are possible
  • grad students (researchers)
  • longer term - any problem that doesn’t fit in a small # of cores

Evaluation:

  • micro-benchmarks just tell you how good a particular mechanism is, not the interaction between mechanisms (need applications for this)
  • latency vs. data volume (messages) vs. scale of machine
    • ideal would be a straight horizontal line
    • want to be linear maybe, not asymptotic
  • less qualitative analysis these days than in the past
  • they built the J-machine, so real world testing was done
  • what was the point?
    • some things were sacrificed, wasn’t the fasted clock spee
    • learn where problems are instead of where you think they are
    • attention to detail, can’t gloss over things, have to deal with problems (very little at the end you can ignore)
  • why choose this paper?
    • idea of parallel ubiquitous simple components (fully functional cores) comes up a lot
    • CM5 with TAM was much faster than TAM with J-machine