Rixner et al.,A Bandwidth-Efficient Architecture for Media Processing

What is the problem:

  • Current architectures dont match media processing requirements with hardware capabilities
    -not enough parallelism
    -too much global and off chip bandwidth
    -need more bandwidth to ALUs than can be supplied by a traditional architecture (centralized register file, caches etc)
  • How to program these new architectures?

Who are the intended users:

  • Media applications
    -Audio processing
    -Video processing
    -Image processing
    -Graphics processing
    -Online compression/encryption
    -Signal processing

Characteristics of a streaming application:

  • Very large data sets (infinite)
  • Only need O(1) storage for a phase of the computation
  • Hopefully the computation >> O(1)
  • Predictability of data access
  • Subset O(1) lifetime of any data element
  • In general, throughput oriented
  • streams:
    -media
    -that do well on Imagine
    -scientific computing
    -realtime data analysis (System S etc)

Imagine & Uniqueness:

  • Regular compute kernel
  • Exposed bandwidth hierarchy
    -off chip DRAM
    -software managed on-chip local memory (SRF)
    -local registers (LRF) instead of one big register file
    -a register file that has to provide storage, bandwidth and communication between ALUs becomes very big and power is a problem
    -communication is explicit
    -interface between SRF and off-chip is throughput oriented (only bulk transfers
  • SRF
    -storing large amount of data that is not accessed often
    -stream buffers used to give ALUs fine grained access, but they take them out of the SRF using wide ports giving an illusion of having multiple ports