Please take a look at the scribing instructions and sign up to the scribe list.

Before each class, submit answers to these questions on Gradescope. I expect a few bullet points for each answer as preparation for discussion. I don’t want to see long paragraphs!

LectureDateTopic (notes)ReadingComments
11/20Introduction and Policies  
21/25GPP binary compatibilityJ. Denhert et al., “The Transmeta Code Morphing™ Software: using speculation, recovery, and adaptive retranslation to address real-life challenges,” CGO’03 
3 + 41/27Reliability and PowerD. Ernst et al., “Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation”, MICRO-36, 2003

A related white paper (I suggest you read it), and a Short Explanation on Metastability
 
3 + 42/1Continue from 3  
52/3SecurityBackground-ish paper: M. Steil, “17 Mistakes Microsoft Made in the Xbox Security System”, Chaos Communication Congress, 2005

Research paper: G. E. Suh et al., “AEGIS: Architecture for Tamper-Evident and Tamper-Resistant Processing”, ICS’03
 
62/8Security IIA. Baumann et al., “Shielding Applications from an Untrusted Cloud with Haven,” OSDI 2014

Some background: Background tutorial slides / Primer writeup with more links
 
72/10Approximate computingS. Venkataramani et al., “Quality Programmable Vector Processors for Approximate Computing,” MICRO 2013 (UTexas ezproxy) 
8+92/15GPP source compatibilityS. Swanson et al., “WaveScalar,” MICRO 2003 
8+92/17Continue from 8  
102/22HW Active MessagesM. Noakes et al., “The J-Machine Multicomputer: An Architecural Evaluation”, ISCA 20, 1993.

PLEASE ALSO READ THIS OVERVIEW WITH PICTURES: W. J. Dally et al., “The J-Machine: A Retrospective”, 1998.
 
112/24Fine-grained ThreadsD. Culler et al., “Fine-Grain Parralelism with Minimal Hardware Support: A Compiler-Controlled Threaded Abstract Machine,” ASPLOS 1991 (UTexas ezproxy) 
122/29Continued  
132/29ContinuedPlease read but don’t submit a writeup: Spertus, Ellen, et al. “Evaluation of mechanisms for fine-grained parallel programs in the J-machine and the CM-5”, ISCA 1993. 
143/7Cache CoherenceS. Reinhardt et al., “Tempest and Typhoon: User-Level Shared Memory 
153/9Continued  
163/21Datacenters (I)Background: J. Dean and L. Barroso, “The Tail at Scale,” CACM 56(2), 2013

Discussion paper: D. Lo et al., “Toward Energy Proportionality for Large-Scale Latency-Critical Workloads,” ISCA 2014
 
173/23Datacenters (continued)C. Hsu et al., “Adrenaline: Pinpointing and Reining in Tail Queries with Quick Voltage Boosting,” HPCA 2015 
183/28Datacetners (II)A. Putnam et al., “A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Applications, “ ISCA 2014 
193/30Project prepNo paper 
204/4Datacenters (III)Lighter reading: V. Jimenez et al., “Energy-Aware Accounting and Billing in Large-Scale Computing Facilities”, IEEE Micro May/Jun 2011

Research: J. Chang et al., “A Limits Study of Benefits from Nanostore-Based Future Data-Centric System Architectures”, CF 2012
 
214/6Exam 1No paper 
224/11Distributed storageJ. C. Corbett et al., “Spanner: Google’s Globally-Distributed Database”, OSDI 2012 
234/13Mem Management (I)E. Witchel et al., “Mondrian Memory Protection”, ASPLOS 2002 
244/18Mobile?M. Halpern et al., “Mobile CPU’s Rise to Power: Quantifying the Impact of Generational Mobile CPU Design Trends on Performance, Energy, and User Satisfaction”, HPCA 2016 
254/20NVM Reliability?DH Yoon et al., FREE-p: Protecting Non-Volatile Memory against both Hard and Soft Errors”, HPCA 2011 
264/25GPU and Virt. Mem.S. Shahar et al., “ActivePointers: the case for software address translation on GPUs”, ISCA 2016

Background: “CUDA Manual”, Sections 1 and 2

Background: K. Fatahalian and M. Houston, “GPUs a closer look”, ACM Queue March/April 2008
 
274/27More mem managementV. Karakostas et al., “Redundant Memory Mappings for Fast Access to Large Memories”, ISCA 2015 
285/2Molecular ComputingD. Doty, “Theory of algorithmic self-assembly”, CACM 55(12), Dec. 2012

Short video
 
295/4WrapupProject presentations and wrapup