Refereed Conferences

  1. Hana Alam, Tianhao Zheng, Mattan Erez, and Yoav Etsion. Do It Yourself Virtual Memory Translation. In the Proceedings of ISCA (\bf to appear). Toronto, Canada, June, 2017, pages 1–12. (PDF) (BibTeX)
  2. Jungrae Kim, Michael Sullivan, Sangkug Lym, and Mattan Erez. All-Inclusive ECC: Thorough End-to-End Protection for Reliable Computer Memory. In the Proceedings of ISCA. Seoul, South Korea, June, 2016, pages 622–633. (PDF) (BibTeX)
  3. Haishan Zhu, and Mattan Erez. Dirigent: Enforcing QoS for Latency-Critical Tasks on Shared Multicore Systems. In the Proceedings of ASPLOS. Atlanta, GA, April, 2016, pages 33–47. (PDF) (SLIDES) (BibTeX)
  4. Jungrae Kim, Michael Sullivan, Esha Choukse, and Mattan Erez. Bit-Plane Compression: Transforming Data for Better Compression in Many-core Architectures. In the Proceedings of ISCA. Seoul, South Korea, June, 2016, pages 329–340. (PDF) (BibTeX)
  5. Dong-Wan Kim, and Mattan Erez. RelaxFault Memory Repair. In the Proceedings of ISCA. Seoul, South Korea, June, 2016, pages 645–657. (PDF) (BibTeX)
  6. Jungrae Kim, Michael Sullivan, and Mattan Erez. Bamboo ECC: Strong, Safe, and Flexible Codes for Reliable Computer Memory. In the Proceedings of HPCA. Burlingame, CA, February, 2015, pages 101–112. (PDF) (BibTeX)
  7. Dong Wan Kim, and Mattan Erez. Balancing Reliability, Cost, and Performance Tradeoffs with FreeFault. In the Proceedings of HPCA. Burlingame, CA, February, 2015, pages 439–450. (PDF) (BibTeX)
  8. Jungrae Kim, Michael Sullivan, Seong-Lyong Gong, and Mattan Erez. Frugal ECC: Efficient and Versatile Memory Error Protection through Fine-Grained Compression. In the Proceedings of SC15. Austin, TX, November, 2015, pages 12:1–12. (PDF) (BibTeX)
  9. Dong Li, Minsoo Rhu, Daniel R. Johnson, Mike O’Connor, Mattan Erez, Doug Burger, Donald S. Fussell, and Stephen W. Keckler. Priority-Based Cache Aladdress in Throughput Processors. In the Proceedings of HPCA. Burlingame, CA, February, 2015, pages 89–100. (PDF) (BibTeX)
  10. Seong-Lyong Gong, Minsoo Rhu, Jungrae Kim, Jinsuk Chung, and Mattan Erez. CLEAN-ECC: High Reliability ECC for Adaptive Granularity Memory System. In the Proceedings of MICRO. Waikiki, HI, December, 2015, pages 611–622. (PDF) (BibTeX)
  11. Minsoo Rhu, and Mattan Erez. The Dual-Path Execution Model for Efficient GPU Control Flow. In the Proceedings of HPCA. Shenzhen, China, February, 2013, pages 561–602. (PDF) (BibTeX)
  12. Tianhao Zheng, Jaeyoung Park, Michael Orshansky, and Mattan Erez. Variable-Energy Write STT-RAM Architecture with Bit-Wise Write-Completion Monitoring. In the Proceedings of ISLPED. Beijing, China, September, 2013, pages 229–234. (PDF) (BibTeX)
  13. Minsoo Rhu, and Mattan Erez. Maximizing SIMD Resource Utilization in GPGPUs with SIMD Lane Permutation. In the Proceedings of ISCA. Tel Aviv, Israel, June, 2013, pages 356–367. (PDF) (BibTeX)
  14. Minsoo Rhu, Michael Sullivan, Jingwen Leng, and Mattan Erez. A Locality-Aware Memory Hierarchy for Energy-Efficient GPU Architectures. In the Proceedings of MICRO. Davis, CA, December, 2013, pages 86–98. (PDF) (BibTeX)
  15. Minsoo Rhu, and Mattan Erez. CAPRI: Prediction of Compaction-Adequacy for Handling Control-Divergence in GPGPU Architectures. In the proceedings of ISCA. Portland, OR, June, 2012, pages 61–71. (PDF) (BibTeX)
  16. Min Kyu Jeong, Doe Hyun Yoon, Dam Sunwoo, Michael Sullivan, Ikhwan Lee, and Mattan Erez. Balancing DRAM Locality and Parallelism in Shared Memory CMP Systems. In the proceedings of HPCA. New Oreleans, LA, February, 2012, pages 1–12. (PDF) (BibTeX)
  17. Robert Pawlowski, Evgeni Krimer, Joseph Crop, Jacob Postman, Nariman Moezzi-Madani, Mattan Erez, and Patrick Chiang. A 530mV 10-Lane SIMD Processor With Variation Resiliency in 45nm SOI. In the proceedings of ISSCC. San Francisco, CA, February, 2012, pages 492–494. (BibTeX)
  18. Doe Hyun Yoon, Min Kyu Jeong, Michael B. Sullivan, and Mattan Erez. The Dynamic Granularity Memory System. In the proceedings of ISCA. Portland, OR, June, 2012, pages 548–559. (PDF) (BibTeX)
  19. Evgeni Krimer, Patrick Chiang, and Mattan Erez. Lane Decoupling for Improving the Timing-Error Resiliency of Wide-SIMD Architectures. In the proceedings of ISCA. Portland, OR, June, 2012, pages 237–248. (PDF) (SLIDES) (BibTeX)
  20. Jinsuk Chung, Ikhwan Lee, Michael Sullivan, Jee Ho Ryoo, Dong Wan Kim, Doe Hyun Yoon, Larry Kaplan, and Mattan Erez. Containment Domains: A Scalable, Efficient, and Flexible Resilience Scheme for Exascale Systems. In the Proceedings of SC12. Salt Lake City, UT, November, 2012, pages 58:1–11. (PDF) (SLIDES) (BibTeX)
  21. Min Kyu Jeong, Chander Sudanthi, Nigel Paver, and Mattan Erez. A QoS-Aware Memory Controller for Dynamically Balancing GPU and CPU Bandwidth Use in an MPSoC. In the Proceedings of DAC. San Francisco, CA, June, 2012, pages 855–860. (PDF) (BibTeX)
  22. Doe Hyun Yoon, Min Kyu Jeong, and Mattan Erez. Adaptive Granularity Memory Systems: A Tradeoff between Storage Efficiency and Throughput. In the proceedings of ISCA. San Jose, CA, June, 2011, pages 295–306. (PDF) (BibTeX)
  23. Doe Hyun Yoon, Naveen Muralimanohar, Jichuan Chang, Parthasarathy Ranganathan, Norman P. Jouppi, and Mattan Erez. FREE-p: Protecting Non-Volatile Memory against both Hard and Soft Errors. In the proceedings of HPCA. San Antonio, TX, February, 2011, pages 466–477. (PDF) (SLIDES) (BibTeX)
  24. Doe Hyun Yoon, and Mattan Erez. Virtualized and Flexible ECC for Main Memory. In the proceedings of ASPLOS. Pittsburgh, PA, March, 2010, pages 397–408. (PDF) (SLIDES) (BibTeX)
  25. Mehmet Basoglu, Michael Orshansky, and Mattan Erez. NBTI-Aware DVFS: a New Approach To Saving Energy And Increasing Processor Lifetime. In the proceedings of ISLPED. Austin, TX, August, 2010, pages 253–258. (PDF) (BibTeX)
  26. Doe Hyun Yoon, and Mattan Erez. Memory Mapped ECC: Low-Cost Error Protection for Last Level Caches. In the proceedings of ISCA. Austin, TX, June, 2009, pages 116–127. (PDF) (SLIDES) (BibTeX)
  27. Mehmet Basoglu, and Mattan Erez. Improving Multi-core Processor Energy Efficiency and Lifetime by Embracing Variability and Wearout. In the proceedings of the Austin Conference on Integrated Systems and Circuits (ACISC). Austin, TX, October, 2009, pages 1–5. (PDF) (BibTeX)
  28. Doe Hyun Yoon, and Mattan Erez. Flexible Cache Error Protection using an ECC FIFO. In the proceedings of SC09. Portland, OR, November, 2009, pages 49:1–12. (PDF) (BibTeX)
  29. Tushar Krishna, Amit Kumar, Patrick Chiang, Mattan Erez, and Li-Shiuan Peh. NoC with Near-Ideal Express Virtual Channels Using Global-Line Communication. In the proceedings of High-Performance Interconnects (HotI-16). Stanford, CA, August, 2008, pages 11–20. (PDF) (BibTeX)
  30. Timothy Knight, Ji Young Park, Manman Ren, Mike Houston, Mattan Erez, Kayvon Fatahalian, Alex Aiken, William Dally, and Pat Hanrahan. Compilation for Explicitly Managed Memory Hierarchies. In the proceedings of PPoPP. San Jose, CA, March, 2007, pages 226–236. (PDF) (BibTeX)
  31. Jayanth Gummaraju, Mattan Erez, Joel Coburn, Mendel Rosenblum, and William J. Dally. Architectural Support for the Stream Execution Model on General-Purpose Processors. In the proceedings of PACT. Brasov, Romania, September, 2007, pages 3–12. ((URL)) (PDF) (BibTeX)
  32. Jung Ho Ahn, William J. Dally, and Mattan Erez. Tradeoff between Data-, Instruction-, and Thread-level Parallelism in Stream Processors. In the proceedings of ICS. Seattle, WA, June, 2007, pages 126–137. (PDF) (BibTeX)
  33. Mattan Erez, Jung Ho Ahn, Jayanth Gummaraju, Mendel Rosenblum, and William J. Dally. Executing Irregular Scientific Applications on Stream Architectures. In the proceedings of ICS. Seattle, WA, June, 2007, pages 93–104. (PDF) (BibTeX)
  34. Ulrich Barnhoefer, Moon-Jung Kim, and Mattan Erez. A Low Power, Passively Cooled 2000cd/m2 Hybrid LED-LCD Display. In the proceedings of IEEE International Symposium on Consumer Electronics. St. Petersburg, Russia, June, 2006, pages 1–4. (PDF) (BibTeX)
  35. Kayvon Fatahalian, Timothy J. Knight, Mike Houston, Mattan Erez, Daniel Reiter Horn, Larkhoon Leem, Ji Young Park, Manman Ren, Alex Aiken, William J. Dally, and Pat Hanrahan. Sequoia: programming the memory hierarchy. In the proceedings of SC06. Tampa, FL, November, 2006. ACM, pages 83:1–13. (PDF) (BibTeX)
  36. Jung Ho Ahn, Mattan Erez, and William J. Dally. The design space of data-parallel memory systems. In the proceedings of SC06. Tampa, FL, November, 2006. ACM, pages 80:1–12. (PDF) (BibTeX)
  37. Jung Ho Ahn, Mattan Erez, and William J. Dally. Scatter-Add in Data Parallel Architectures. In the proceedings of HPCA. San Francisco, CA, February, 2005, pages 132–142. (PDF) (BibTeX)
  38. Mattan Erez, Nuwan Jayasena, Timothy J. Knight, and William J. Dally. Fault Tolerance Techniques for the Merrimac Streaming Supercomputer. In the proceedings of SC05. Seattle, WA, November, 2005, pages 29:1–11. (PDF) (BibTeX)
  39. Mattan Erez, Jung Ho Ahn, Ankit Garg, William J. Dally, and Eric Darve. Analysis and Performance Results of a Molecular Modeling Application on Merrimac. In the proceedings of SC04. Pittsburgh, PA, November, 2004, pages 42:1–10. (PDF) (BibTeX)
  40. Nuwan Jayasena, Mattan Erez, Jung Ho Ahn, and William J. Dally. Stream Register Files with Indexed Access. In the proceedings of HPCA. Madrid, Spain, February, 2004, pages 60–72. (PDF) (BibTeX)
  41. William J. Dally, Patrick Hanrahan, Mattan Erez, Timothy J. Knight, Francois Labonte, Jung-Ho Ahn, Nuwan Jayasena, Ujval J. Kapasi, Abhishek Das, Jayanth Gummaraju, and Ian Buck. Merrimac: Supercomputing with Streams. In the proceedings of SC03. Phoenix, AZ, November, 2003, pages 35:1–8. (PDF) (BibTeX)
  42. Stephan Jourdan, Lihu Rappoport, Yoav Almog, Mattan Erez, Adi Yoaz, and Ronny Ronen. eXtendedBlock Cache. In the proceedings of HPCA. Toulouse, France, January, 2000, pages 61–70. (PDF) (BibTeX)
  43. Adi Yoaz, Mattan Erez, Ronny Ronen, and Stephan Jourdan. Speculation Techniques for Improving Load Related Instruction Scheduling. In the proceeings of ISCA. Atlanta, GA, May, 1999, pages 42–53. ((URL)) (PDF) (BibTeX)

Journals and Magazines

  1. Jaeyoung Park, Tianhao Zheng, Mattan Erez, and Michael Orshansky. Variation-Tolerant Write Completion Circuit for Variable-Energy Write STT-RAM Architecture. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 24(4):1351–1360, April, 2016. (BibTeX)
  2. Tomer Morad, Gil Shomron, Mattan Erez, Avinoam Kolodny, and Uri Weiser. Optimizing Read-Once Data Flow in Big-Data Applications. IEEE Computer Architecture Letters, PP(99):1–4, January, 2016. (BibTeX)
  3. Marc Snir, Robert W Wisniewski, Jacob A Abraham, Sarita V Adve, Saurabh Bagchi, Pavan Balaji, Jim Belak, Pradip Bose, Franck Cappello, Bill Carlson, Andrew A Chien, Paul Coteus, Nathan A DeBardeleben, Pedro C Diniz, Christian Engelmann, Mattan Erez, Saverio Fazzari, Al Geist, Rinku Gupta, Fred Johnson, Sriram Krishnamoorthy, Sven Leyffer, Dean Liberty, Subhasish Mitra, Todd Munson, Rob Schreiber, Jon Stearley, and Eric Van Hensbergen. Addressing Failures in Exascale Computing. International Journal of High Performance Computing Applications, 28(2):129–173, May, 2014. (BibTeX)
  4. Jinsuk Chung, Ikhwan Lee, Michael Sullivan, Jee Ho Ryoo, Dong Wan Kim, Doe Hyun Yoon, Larry Kaplan, and Mattan Erez. Containment Domains: A Scalable, Efficient, and Flexible Resilience Scheme for Exascale Systems. Scientific Programming, 21(3):197–212, January, 2013. (BibTeX)
  5. Doe Hyun Yoon, Min Kyu Jeong, Michael Sullivan, and Mattan Erez. Towards Proportional Memory Systems. Intel Technology Journal, 17:118–139, 2012. ((URL)) (BibTeX)
  6. Doe Hyun Yoon, Naveen Muralimanohar, Jichuan Chang, Parthasarthy Ranganathan, Norman P. Jouppi, and Mattan Erez. FREE-p: A Practical End-to-End Nonvolatile Memory Protection Mechanism. IEEE Micro TopPicks, 32(3):79–87, May, 2012. (BibTeX)
  7. Evgeni Krimer, and Mattan Erez. The Power of 1 + $\alpha$; for Memory-Efficient Bloom Filters. Internet Mathematics, 7(1):28–44, March, 2011. (PDF) (BibTeX)
  8. Joseph Crop, Evgeni Krimer, Nariman Moezzi-Madani, Robert Pawlowski, Thomas Ruggeri, Patrick Chiang, and Mattan Erez. Error Detection and Recovery Techniques for Variation-Aware CMOS Computing: A Comprehensive Review. Journal of Low Power Electronics and Applications, 1(3):334–356, October, 2011. (BibTeX)
  9. Evgeni Krimer, Isaac Keslassy, Avinoam Kolodny, Isask’har Walter, and Mattan Erez. Static timing analysis for modeling QoS in networks on chip. Journal of Parallel and Distributed Computing, 71(5):687–699, May, 2011. (PDF) (BibTeX)
  10. Doe Hyun Yoon, and Mattan Erez. Virtualized ECC: Flexible Reliability in Main Memory. IEEE Micro, 31(1):11–19, 2011. (BibTeX)
  11. Evgeni Krimer, Robert Pawlowski, Mattan Erez, and Patrick Chiang. Synctium: a Near-Threshold Stream Processor for Energy-Constrained Parallel Applications. IEEE IEEE Computer Architecture Letters, 9(1):21–24, January, 2010. (PDF) (BibTeX)
  12. Tushar Krishna, Amit Kumar, Li-Shiuan Peh, Jacob Postman, Patrick P. Chiang, and Mattan Erez. Express Virtual Channels with Capacitively Driven Global Links. IEEE Micro, 29:48–61, August, 2009. (BibTeX)

Books and Chapters

  1. Alan Gatherer, Haishan Zhu, and Mattan Erez. Baseband Architectures to Support Wireless Cellular Infrastructure: History and Future Evolution. In Academic Press Library in Mobile and Wireless Communications — Transmission Techniques for Digital Communications, pages 689–705. . Elsevier, 2016. ((URL)) (BibTeX)
  2. Mattan Erez, and William J. Dally. Stream Processors. In Multicore Processors and Systems, pages 231–270. . Springer, 2009. ((URL)) (BibTeX)

Technical Reports

  1. Michael Sullivan, Ikhwan Lee, Jinsuk Chung, Song Zhang, Seong-Lyong Gong, Derong Liu, Michael LeBeane, Kyushick Lee, and Mattan Erez. Containment Domains Semantics version 0.2. Technical report Tr-LPH-2014–001, LPH Group, Department of Electrical and Computer Engineering, The University of Texas at Austin, February, 2014. (PDF) (BibTeX)
  2. Michael Sullivan, Ikhwan Lee, Jinsuk Chung, Song Zhang, Seong-Lyong Gong, Derong Liu, Michael LeBeane, and Mattan Erez. Containment Domains Semantics version 0.1. Technical report Tr-LPH-2013–001, LPH Group, Department of Electrical and Computer Engineering, The University of Texas at Austin, October, 2013. (PDF) (BibTeX)
  3. Ikhwan Lee, Michael Sullivan, Evgeni Krimer, Dong Wan Kim, Mehmet Basoglu, Doe Hyun Yoon, Larry Kaplan, and Mattan Erez. Survey of Error and Fault Detection Mechanisms v2. Technical report TR-LPH-2012–001, LPH Group, Department of Electrical and Computer Engineering, The University of Texas at Austin, December, 2012. (PDF) (BibTeX)
  4. Ikhwan Lee, Mehmet Basoglu, Michael Sullivan, Doe Hyun Yoon, Larry Kaplan, and Mattan Erez. Survey of Error and Fault Detection Mechanisms. Technical report TR-LPH-2011–002, LPH Group, Department of Electrical and Computer Engineering, The University of Texas at Austin, April, 2011. (PDF) (BibTeX)
  5. Michael Sullivan, Doe Hyun Yoon, and Mattan Erez. Containment Domains: A Full-System Approach to Computational Resiliency. Technical report TR-LPH-2011–001, LPH Group, Department of Electrical and Computer Engineering, The University of Texas at Austin, January, 2011. (PDF) (BibTeX)
  6. Evgeni Krimer, Isaac Keslassy, Avinoam Kolodny, Isask’har Walter, and Mattan Erez. Packet-Level Static Timing Analysis for NoCs. Technical report CCIT #737, Department of Electrical Engineering, Technion, July, 2009. (BibTeX)
  7. Mattan Erez. Merrimac — High-Performance, Highly-Efficient Scientific Computing with Streams. PhD thesis, Stanford University, November, 2006. (PDF) (BibTeX)
  8. Mattan Erez, Brian Towles, and William J. Dally. Spills, Fills, and Kills - An Architecture for Reducing Register-Memory Traffic. Technical report Concurrent VLSI Architecture (TR-23), Stanford University, July, 2000. (PDF) (BibTeX)

Issued Patents

  1. Stephan Jourdan, Adi Yoaz, Mattan Erez, and Ronny Ronen. US Patent #8,943,298: Meta Predictor Restoration Upon Detecting Misprediction., January, 2015. (BibTeX)
  2. Jung-Ho Ahn, Mattan Erez, and William J. Dally. US Patent #8,959,292: Atomic Memory Access Hardware Implementations., February, 2015. (BibTeX)
  3. Stephan Jourdan, Adi Yoaz, Mattan Erez, and Ronny Ronen. US Patent #8,572,358: Meta Predictor Restoration Upon Detecting Misprediction., October, 2013. (BibTeX)
  4. Stephan Jourdan, Adi Yoaz, Mattan Erez, and Ronny Ronen. US Patent #8,285,976: Method and Apparatus for Predicting Branches Using a Meta Predictor., October, 2012. (BibTeX)
  5. Adi Yoaz, Ronny Ronen, Lihu Rappoport, Mattan Erez, Stephan Jourdan, and Robert Valentine. US Patent #7,644,236: Memory Cache Bank Prediction., January, 2010. (BibTeX)
  6. Adi Yoaz, Ronny Ronen, Lihu Rappoport, Mattan Erez, Stephan Jourdan, and Robert Valentine. US Patent #6,880,063: Memory Cache Bank Prediction., April, 2005. (BibTeX)
  7. Adi Yoaz, Mattan Erez, and Ronny Ronen. US Patent #6,697,932: System and Method for Early Resolution of Low Confidence Branches and Safe Data Cache Accesses., February, 2004. (BibTeX)
  8. Adi Yoaz, Gregory Pribush, Freddy Gabbay, Mattan Erez, and Ronny Ronen. US Patent #6,757,816: Fast Branch Misprediction Recovery Method and System., June, 2004. (BibTeX)
  9. Adi Yoaz, Ronny Ronen, Lihu Rappoport, Mattan Erez, Stephan Jourdan, and Robert Valentine. US Patent #6,694,421: Cache Memory Bank Access Prediction., February, 2004. (BibTeX)

All

2017

  1. Hana Alam, Tianhao Zheng, Mattan Erez, and Yoav Etsion. Do It Yourself Virtual Memory Translation. In the Proceedings of ISCA (\bf to appear). Toronto, Canada, June, 2017, pages 1–12. (PDF) (BibTeX)

2016

  1. Dong-Wan Kim, and Mattan Erez. RelaxFault Memory Repair. In the Proceedings of ISCA. Seoul, South Korea, June, 2016, pages 645–657. (PDF) (BibTeX)
  2. Jungrae Kim, Michael Sullivan, Sangkug Lym, and Mattan Erez. All-Inclusive ECC: Thorough End-to-End Protection for Reliable Computer Memory. In the Proceedings of ISCA. Seoul, South Korea, June, 2016, pages 622–633. (PDF) (BibTeX)
  3. Jungrae Kim, Michael Sullivan, Esha Choukse, and Mattan Erez. Bit-Plane Compression: Transforming Data for Better Compression in Many-core Architectures. In the Proceedings of ISCA. Seoul, South Korea, June, 2016, pages 329–340. (PDF) (BibTeX)
  4. Tomer Morad, Gil Shomron, Mattan Erez, Avinoam Kolodny, and Uri Weiser. Optimizing Read-Once Data Flow in Big-Data Applications. IEEE Computer Architecture Letters, PP(99):1–4, January, 2016. (BibTeX)
  5. Haishan Zhu, and Mattan Erez. Dirigent: Enforcing QoS for Latency-Critical Tasks on Shared Multicore Systems. In the Proceedings of ASPLOS. Atlanta, GA, April, 2016, pages 33–47. (PDF) (SLIDES) (BibTeX)
  6. Jaeyoung Park, Tianhao Zheng, Mattan Erez, and Michael Orshansky. Variation-Tolerant Write Completion Circuit for Variable-Energy Write STT-RAM Architecture. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 24(4):1351–1360, April, 2016. (BibTeX)
  7. Alan Gatherer, Haishan Zhu, and Mattan Erez. Baseband Architectures to Support Wireless Cellular Infrastructure: History and Future Evolution. In Academic Press Library in Mobile and Wireless Communications — Transmission Techniques for Digital Communications, pages 689–705. . Elsevier, 2016. ((URL)) (BibTeX)

2015

  1. Jungrae Kim, Michael Sullivan, Seong-Lyong Gong, and Mattan Erez. Frugal ECC: Efficient and Versatile Memory Error Protection through Fine-Grained Compression. In the Proceedings of SC15. Austin, TX, November, 2015, pages 12:1–12. (PDF) (BibTeX)
  2. Stephan Jourdan, Adi Yoaz, Mattan Erez, and Ronny Ronen. US Patent #8,943,298: Meta Predictor Restoration Upon Detecting Misprediction., January, 2015. (BibTeX)
  3. Dong Li, Minsoo Rhu, Daniel R. Johnson, Mike O’Connor, Mattan Erez, Doug Burger, Donald S. Fussell, and Stephen W. Keckler. Priority-Based Cache Aladdress in Throughput Processors. In the Proceedings of HPCA. Burlingame, CA, February, 2015, pages 89–100. (PDF) (BibTeX)
  4. Dong Wan Kim, and Mattan Erez. Balancing Reliability, Cost, and Performance Tradeoffs with FreeFault. In the Proceedings of HPCA. Burlingame, CA, February, 2015, pages 439–450. (PDF) (BibTeX)
  5. Jung-Ho Ahn, Mattan Erez, and William J. Dally. US Patent #8,959,292: Atomic Memory Access Hardware Implementations., February, 2015. (BibTeX)
  6. Jungrae Kim, Michael Sullivan, and Mattan Erez. Bamboo ECC: Strong, Safe, and Flexible Codes for Reliable Computer Memory. In the Proceedings of HPCA. Burlingame, CA, February, 2015, pages 101–112. (PDF) (BibTeX)
  7. Seong-Lyong Gong, Minsoo Rhu, Jungrae Kim, Jinsuk Chung, and Mattan Erez. CLEAN-ECC: High Reliability ECC for Adaptive Granularity Memory System. In the Proceedings of MICRO. Waikiki, HI, December, 2015, pages 611–622. (PDF) (BibTeX)

2014

  1. Marc Snir, Robert W Wisniewski, Jacob A Abraham, Sarita V Adve, Saurabh Bagchi, Pavan Balaji, Jim Belak, Pradip Bose, Franck Cappello, Bill Carlson, Andrew A Chien, Paul Coteus, Nathan A DeBardeleben, Pedro C Diniz, Christian Engelmann, Mattan Erez, Saverio Fazzari, Al Geist, Rinku Gupta, Fred Johnson, Sriram Krishnamoorthy, Sven Leyffer, Dean Liberty, Subhasish Mitra, Todd Munson, Rob Schreiber, Jon Stearley, and Eric Van Hensbergen. Addressing Failures in Exascale Computing. International Journal of High Performance Computing Applications, 28(2):129–173, May, 2014. (BibTeX)
  2. Michael Sullivan, Ikhwan Lee, Jinsuk Chung, Song Zhang, Seong-Lyong Gong, Derong Liu, Michael LeBeane, Kyushick Lee, and Mattan Erez. Containment Domains Semantics version 0.2. Technical report Tr-LPH-2014–001, LPH Group, Department of Electrical and Computer Engineering, The University of Texas at Austin, February, 2014. (PDF) (BibTeX)

2013

  1. Tianhao Zheng, Jaeyoung Park, Michael Orshansky, and Mattan Erez. Variable-Energy Write STT-RAM Architecture with Bit-Wise Write-Completion Monitoring. In the Proceedings of ISLPED. Beijing, China, September, 2013, pages 229–234. (PDF) (BibTeX)
  2. Michael Sullivan, Ikhwan Lee, Jinsuk Chung, Song Zhang, Seong-Lyong Gong, Derong Liu, Michael LeBeane, and Mattan Erez. Containment Domains Semantics version 0.1. Technical report Tr-LPH-2013–001, LPH Group, Department of Electrical and Computer Engineering, The University of Texas at Austin, October, 2013. (PDF) (BibTeX)
  3. Stephan Jourdan, Adi Yoaz, Mattan Erez, and Ronny Ronen. US Patent #8,572,358: Meta Predictor Restoration Upon Detecting Misprediction., October, 2013. (BibTeX)
  4. Minsoo Rhu, and Mattan Erez. Maximizing SIMD Resource Utilization in GPGPUs with SIMD Lane Permutation. In the Proceedings of ISCA. Tel Aviv, Israel, June, 2013, pages 356–367. (PDF) (BibTeX)
  5. Jinsuk Chung, Ikhwan Lee, Michael Sullivan, Jee Ho Ryoo, Dong Wan Kim, Doe Hyun Yoon, Larry Kaplan, and Mattan Erez. Containment Domains: A Scalable, Efficient, and Flexible Resilience Scheme for Exascale Systems. Scientific Programming, 21(3):197–212, January, 2013. (BibTeX)
  6. Minsoo Rhu, and Mattan Erez. The Dual-Path Execution Model for Efficient GPU Control Flow. In the Proceedings of HPCA. Shenzhen, China, February, 2013, pages 561–602. (PDF) (BibTeX)
  7. Minsoo Rhu, Michael Sullivan, Jingwen Leng, and Mattan Erez. A Locality-Aware Memory Hierarchy for Energy-Efficient GPU Architectures. In the Proceedings of MICRO. Davis, CA, December, 2013, pages 86–98. (PDF) (BibTeX)

2012

  1. Stephan Jourdan, Adi Yoaz, Mattan Erez, and Ronny Ronen. US Patent #8,285,976: Method and Apparatus for Predicting Branches Using a Meta Predictor., October, 2012. (BibTeX)
  2. Jinsuk Chung, Ikhwan Lee, Michael Sullivan, Jee Ho Ryoo, Dong Wan Kim, Doe Hyun Yoon, Larry Kaplan, and Mattan Erez. Containment Domains: A Scalable, Efficient, and Flexible Resilience Scheme for Exascale Systems. In the Proceedings of SC12. Salt Lake City, UT, November, 2012, pages 58:1–11. (PDF) (SLIDES) (BibTeX)
  3. Doe Hyun Yoon, Naveen Muralimanohar, Jichuan Chang, Parthasarthy Ranganathan, Norman P. Jouppi, and Mattan Erez. FREE-p: A Practical End-to-End Nonvolatile Memory Protection Mechanism. IEEE Micro TopPicks, 32(3):79–87, May, 2012. (BibTeX)
  4. Doe Hyun Yoon, Min Kyu Jeong, Michael B. Sullivan, and Mattan Erez. The Dynamic Granularity Memory System. In the proceedings of ISCA. Portland, OR, June, 2012, pages 548–559. (PDF) (BibTeX)
  5. Evgeni Krimer, Patrick Chiang, and Mattan Erez. Lane Decoupling for Improving the Timing-Error Resiliency of Wide-SIMD Architectures. In the proceedings of ISCA. Portland, OR, June, 2012, pages 237–248. (PDF) (SLIDES) (BibTeX)
  6. Minsoo Rhu, and Mattan Erez. CAPRI: Prediction of Compaction-Adequacy for Handling Control-Divergence in GPGPU Architectures. In the proceedings of ISCA. Portland, OR, June, 2012, pages 61–71. (PDF) (BibTeX)
  7. Min Kyu Jeong, Chander Sudanthi, Nigel Paver, and Mattan Erez. A QoS-Aware Memory Controller for Dynamically Balancing GPU and CPU Bandwidth Use in an MPSoC. In the Proceedings of DAC. San Francisco, CA, June, 2012, pages 855–860. (PDF) (BibTeX)
  8. Min Kyu Jeong, Doe Hyun Yoon, Dam Sunwoo, Michael Sullivan, Ikhwan Lee, and Mattan Erez. Balancing DRAM Locality and Parallelism in Shared Memory CMP Systems. In the proceedings of HPCA. New Oreleans, LA, February, 2012, pages 1–12. (PDF) (BibTeX)
  9. Robert Pawlowski, Evgeni Krimer, Joseph Crop, Jacob Postman, Nariman Moezzi-Madani, Mattan Erez, and Patrick Chiang. A 530mV 10-Lane SIMD Processor With Variation Resiliency in 45nm SOI. In the proceedings of ISSCC. San Francisco, CA, February, 2012, pages 492–494. (BibTeX)
  10. Ikhwan Lee, Michael Sullivan, Evgeni Krimer, Dong Wan Kim, Mehmet Basoglu, Doe Hyun Yoon, Larry Kaplan, and Mattan Erez. Survey of Error and Fault Detection Mechanisms v2. Technical report TR-LPH-2012–001, LPH Group, Department of Electrical and Computer Engineering, The University of Texas at Austin, December, 2012. (PDF) (BibTeX)
  11. Doe Hyun Yoon, Min Kyu Jeong, Michael Sullivan, and Mattan Erez. Towards Proportional Memory Systems. Intel Technology Journal, 17:118–139, 2012. ((URL)) (BibTeX)

2011

  1. Joseph Crop, Evgeni Krimer, Nariman Moezzi-Madani, Robert Pawlowski, Thomas Ruggeri, Patrick Chiang, and Mattan Erez. Error Detection and Recovery Techniques for Variation-Aware CMOS Computing: A Comprehensive Review. Journal of Low Power Electronics and Applications, 1(3):334–356, October, 2011. (BibTeX)
  2. Evgeni Krimer, Isaac Keslassy, Avinoam Kolodny, Isask’har Walter, and Mattan Erez. Static timing analysis for modeling QoS in networks on chip. Journal of Parallel and Distributed Computing, 71(5):687–699, May, 2011. (PDF) (BibTeX)
  3. Evgeni Krimer, and Mattan Erez. The Power of 1 + $\alpha$; for Memory-Efficient Bloom Filters. Internet Mathematics, 7(1):28–44, March, 2011. (PDF) (BibTeX)
  4. Doe Hyun Yoon, Min Kyu Jeong, and Mattan Erez. Adaptive Granularity Memory Systems: A Tradeoff between Storage Efficiency and Throughput. In the proceedings of ISCA. San Jose, CA, June, 2011, pages 295–306. (PDF) (BibTeX)
  5. Michael Sullivan, Doe Hyun Yoon, and Mattan Erez. Containment Domains: A Full-System Approach to Computational Resiliency. Technical report TR-LPH-2011–001, LPH Group, Department of Electrical and Computer Engineering, The University of Texas at Austin, January, 2011. (PDF) (BibTeX)
  6. Doe Hyun Yoon, Naveen Muralimanohar, Jichuan Chang, Parthasarathy Ranganathan, Norman P. Jouppi, and Mattan Erez. FREE-p: Protecting Non-Volatile Memory against both Hard and Soft Errors. In the proceedings of HPCA. San Antonio, TX, February, 2011, pages 466–477. (PDF) (SLIDES) (BibTeX)
  7. Ikhwan Lee, Mehmet Basoglu, Michael Sullivan, Doe Hyun Yoon, Larry Kaplan, and Mattan Erez. Survey of Error and Fault Detection Mechanisms. Technical report TR-LPH-2011–002, LPH Group, Department of Electrical and Computer Engineering, The University of Texas at Austin, April, 2011. (PDF) (BibTeX)
  8. Doe Hyun Yoon, and Mattan Erez. Virtualized ECC: Flexible Reliability in Main Memory. IEEE Micro, 31(1):11–19, 2011. (BibTeX)

2010

  1. Doe Hyun Yoon, and Mattan Erez. Virtualized and Flexible ECC for Main Memory. In the proceedings of ASPLOS. Pittsburgh, PA, March, 2010, pages 397–408. (PDF) (SLIDES) (BibTeX)
  2. Adi Yoaz, Ronny Ronen, Lihu Rappoport, Mattan Erez, Stephan Jourdan, and Robert Valentine. US Patent #7,644,236: Memory Cache Bank Prediction., January, 2010. (BibTeX)
  3. Evgeni Krimer, Robert Pawlowski, Mattan Erez, and Patrick Chiang. Synctium: a Near-Threshold Stream Processor for Energy-Constrained Parallel Applications. IEEE IEEE Computer Architecture Letters, 9(1):21–24, January, 2010. (PDF) (BibTeX)
  4. Mehmet Basoglu, Michael Orshansky, and Mattan Erez. NBTI-Aware DVFS: a New Approach To Saving Energy And Increasing Processor Lifetime. In the proceedings of ISLPED. Austin, TX, August, 2010, pages 253–258. (PDF) (BibTeX)

2009

  1. Mehmet Basoglu, and Mattan Erez. Improving Multi-core Processor Energy Efficiency and Lifetime by Embracing Variability and Wearout. In the proceedings of the Austin Conference on Integrated Systems and Circuits (ACISC). Austin, TX, October, 2009, pages 1–5. (PDF) (BibTeX)
  2. Doe Hyun Yoon, and Mattan Erez. Flexible Cache Error Protection using an ECC FIFO. In the proceedings of SC09. Portland, OR, November, 2009, pages 49:1–12. (PDF) (BibTeX)
  3. Doe Hyun Yoon, and Mattan Erez. Memory Mapped ECC: Low-Cost Error Protection for Last Level Caches. In the proceedings of ISCA. Austin, TX, June, 2009, pages 116–127. (PDF) (SLIDES) (BibTeX)
  4. Evgeni Krimer, Isaac Keslassy, Avinoam Kolodny, Isask’har Walter, and Mattan Erez. Packet-Level Static Timing Analysis for NoCs. Technical report CCIT #737, Department of Electrical Engineering, Technion, July, 2009. (BibTeX)
  5. Tushar Krishna, Amit Kumar, Li-Shiuan Peh, Jacob Postman, Patrick P. Chiang, and Mattan Erez. Express Virtual Channels with Capacitively Driven Global Links. IEEE Micro, 29:48–61, August, 2009. (BibTeX)
  6. Mattan Erez, and William J. Dally. Stream Processors. In Multicore Processors and Systems, pages 231–270. . Springer, 2009. ((URL)) (BibTeX)

2008

  1. Tushar Krishna, Amit Kumar, Patrick Chiang, Mattan Erez, and Li-Shiuan Peh. NoC with Near-Ideal Express Virtual Channels Using Global-Line Communication. In the proceedings of High-Performance Interconnects (HotI-16). Stanford, CA, August, 2008, pages 11–20. (PDF) (BibTeX)

2007

  1. Jayanth Gummaraju, Mattan Erez, Joel Coburn, Mendel Rosenblum, and William J. Dally. Architectural Support for the Stream Execution Model on General-Purpose Processors. In the proceedings of PACT. Brasov, Romania, September, 2007, pages 3–12. ((URL)) (PDF) (BibTeX)
  2. Timothy Knight, Ji Young Park, Manman Ren, Mike Houston, Mattan Erez, Kayvon Fatahalian, Alex Aiken, William Dally, and Pat Hanrahan. Compilation for Explicitly Managed Memory Hierarchies. In the proceedings of PPoPP. San Jose, CA, March, 2007, pages 226–236. (PDF) (BibTeX)
  3. Mattan Erez, Jung Ho Ahn, Jayanth Gummaraju, Mendel Rosenblum, and William J. Dally. Executing Irregular Scientific Applications on Stream Architectures. In the proceedings of ICS. Seattle, WA, June, 2007, pages 93–104. (PDF) (BibTeX)
  4. Jung Ho Ahn, William J. Dally, and Mattan Erez. Tradeoff between Data-, Instruction-, and Thread-level Parallelism in Stream Processors. In the proceedings of ICS. Seattle, WA, June, 2007, pages 126–137. (PDF) (BibTeX)

2006

  1. Kayvon Fatahalian, Timothy J. Knight, Mike Houston, Mattan Erez, Daniel Reiter Horn, Larkhoon Leem, Ji Young Park, Manman Ren, Alex Aiken, William J. Dally, and Pat Hanrahan. Sequoia: programming the memory hierarchy. In the proceedings of SC06. Tampa, FL, November, 2006. ACM, pages 83:1–13. (PDF) (BibTeX)
  2. Jung Ho Ahn, Mattan Erez, and William J. Dally. The design space of data-parallel memory systems. In the proceedings of SC06. Tampa, FL, November, 2006. ACM, pages 80:1–12. (PDF) (BibTeX)
  3. Mattan Erez. Merrimac — High-Performance, Highly-Efficient Scientific Computing with Streams. PhD thesis, Stanford University, November, 2006. (PDF) (BibTeX)
  4. Ulrich Barnhoefer, Moon-Jung Kim, and Mattan Erez. A Low Power, Passively Cooled 2000cd/m2 Hybrid LED-LCD Display. In the proceedings of IEEE International Symposium on Consumer Electronics. St. Petersburg, Russia, June, 2006, pages 1–4. (PDF) (BibTeX)

2005

  1. Mattan Erez, Nuwan Jayasena, Timothy J. Knight, and William J. Dally. Fault Tolerance Techniques for the Merrimac Streaming Supercomputer. In the proceedings of SC05. Seattle, WA, November, 2005, pages 29:1–11. (PDF) (BibTeX)
  2. Jung Ho Ahn, Mattan Erez, and William J. Dally. Scatter-Add in Data Parallel Architectures. In the proceedings of HPCA. San Francisco, CA, February, 2005, pages 132–142. (PDF) (BibTeX)
  3. Adi Yoaz, Ronny Ronen, Lihu Rappoport, Mattan Erez, Stephan Jourdan, and Robert Valentine. US Patent #6,880,063: Memory Cache Bank Prediction., April, 2005. (BibTeX)

2004

  1. Mattan Erez, Jung Ho Ahn, Ankit Garg, William J. Dally, and Eric Darve. Analysis and Performance Results of a Molecular Modeling Application on Merrimac. In the proceedings of SC04. Pittsburgh, PA, November, 2004, pages 42:1–10. (PDF) (BibTeX)
  2. Adi Yoaz, Gregory Pribush, Freddy Gabbay, Mattan Erez, and Ronny Ronen. US Patent #6,757,816: Fast Branch Misprediction Recovery Method and System., June, 2004. (BibTeX)
  3. Nuwan Jayasena, Mattan Erez, Jung Ho Ahn, and William J. Dally. Stream Register Files with Indexed Access. In the proceedings of HPCA. Madrid, Spain, February, 2004, pages 60–72. (PDF) (BibTeX)
  4. Adi Yoaz, Mattan Erez, and Ronny Ronen. US Patent #6,697,932: System and Method for Early Resolution of Low Confidence Branches and Safe Data Cache Accesses., February, 2004. (BibTeX)
  5. Adi Yoaz, Ronny Ronen, Lihu Rappoport, Mattan Erez, Stephan Jourdan, and Robert Valentine. US Patent #6,694,421: Cache Memory Bank Access Prediction., February, 2004. (BibTeX)

2003

  1. William J. Dally, Patrick Hanrahan, Mattan Erez, Timothy J. Knight, Francois Labonte, Jung-Ho Ahn, Nuwan Jayasena, Ujval J. Kapasi, Abhishek Das, Jayanth Gummaraju, and Ian Buck. Merrimac: Supercomputing with Streams. In the proceedings of SC03. Phoenix, AZ, November, 2003, pages 35:1–8. (PDF) (BibTeX)

2000

  1. Mattan Erez, Brian Towles, and William J. Dally. Spills, Fills, and Kills - An Architecture for Reducing Register-Memory Traffic. Technical report Concurrent VLSI Architecture (TR-23), Stanford University, July, 2000. (PDF) (BibTeX)
  2. Stephan Jourdan, Lihu Rappoport, Yoav Almog, Mattan Erez, Adi Yoaz, and Ronny Ronen. eXtendedBlock Cache. In the proceedings of HPCA. Toulouse, France, January, 2000, pages 61–70. (PDF) (BibTeX)

1999

  1. Adi Yoaz, Mattan Erez, Ronny Ronen, and Stephan Jourdan. Speculation Techniques for Improving Load Related Instruction Scheduling. In the proceeings of ISCA. Atlanta, GA, May, 1999, pages 42–53. ((URL)) (PDF) (BibTeX)